TY  - JOUR
T1  - Design and Implementation of Reduced Area Reed Solomon Encoder using Quantum 
  Dot Cellular Automata
AU - Palanisamy, Ilanchezhian AU - Rathinam Meenatchi Sundaram, Parvathi 
JO  - Asian Journal of Information Technology
VL  - 12
IS  - 10
SP  - 329
EP  - 333
PY  - 2013
DA  - 2001/08/19
SN  - 1682-3915
DO  - ajit.2013.329.333
UR  - https://makhillpublications.co/view-article.php?doi=ajit.2013.329.333
KW  - Reed Solomon encoder
KW  -Ex-OR gate
KW  -majority gate
KW  -QCA designer
KW  -scale
AB  - Reed Solomon (RS) codes are one of the most extensively used error correcting codes in contemporary digital communication broadcast systems. The area and complexity are the major issues in digital circuit design. This study proposes an implementation of Reed Solomon encoder circuit with reduced area using nanotechnology based Quantum dot Cellular Automata. Here, researchers uses a reduced cell EX-OR gate to perform all computation of Reed Solomon encoder circuit. The Reed Solomon encoder circuit has been synthesized using QCA designer tool. The available conventional Reed Solomon encoder circuit occupies larger area but because of the nano scale technology the area and complexity of the proposed Reed Solomon encoder circuit is reduced considerably. The proposed design needs only about 86% of the hardware compared to previous design with same clocking performance.
ER  -