Vinod  Kapoor, Narottam  Chand, Ashwani K.  Rana, 
    Analysis and Application of Hybrid MOSFET Structure for Low Gate Leakage,
    Journal of Engineering and Applied Sciences,
    Volume 6,Issue 1,
    2011,
    Pages 38-46,
    ISSN 1816-949x,
    jeasci.2011.38.46,
    (https://makhillpublications.co/view-article.php?doi=jeasci.2011.38.46)
    Abstract: A novel Hybrid MOSFET (HMOS) structure has been proposed to diminish the gate leakage current significantly. This novel Hybrid MOSFET (HMOS) consist of source/drain-to-gate non-overlap region and high-k layer/interfacial oxide as gate stack. Vertical fringing electric field through the high-k dielectric spacer induces inversion in the non-overlap region to act as extended S/D. The gate leakage behaviour of HMOS has been investigated with the help of compact analytical model and Sentaurus simulation. The model sustains a very good agreement between the model and TCAD result. It is found that HMOS structure has reduced the gate leakage current to great extent as compared to conventional overlapped MOSFET structure. Further, the proposed structure had demonstrated improved on current, off current, subthreshold slope and DIBL characteristic.
    Keywords: subthreshold slope;analytical model;spacer dielectrics;gate tunneling current;Hybrid MOSFET (HMOS);DIBL