J.  Gowrishankar, J.  Belwinedward, 
    A 31-Level Asymmetrical Cascaded H Bridge Multilevel Inverter,
    Journal of Engineering and Applied Sciences,
    Volume 13,Issue 12,
    2018,
    Pages 4542-4550,
    ISSN 1816-949x,
    jeasci.2018.4542.4550,
    (https://makhillpublications.co/view-article.php?doi=jeasci.2018.4542.4550)
    Abstract: This project commenced with a 31-level Asymmetrical Cascaded H-Bridge Multilevel Inverter
(ASCHBMLI). The topology is based on a cascaded connection of single stage sub multilevel converter unit
and full bridge cascaded H-bridge inverter. The input DC voltage source of V <sub>dc1</sub>-V <sub>dc4</sub>are planned in 
paired type of voltage of 15 V <sub>dc1</sub>, 30 V <sub>dc2</sub>, 60 V <sub>dc3</sub>and 120 V <sub>dc4</sub>individually. The output voltage levels are 
2*(1+2+4+8)+1 = 31) 31 level. The low frequency pulse width modulation technique is utilized for controlling
the power semiconductor switches in the ASCHBMLI. Total harmonic distortion is analyses and executed in
real time system using PIC16F877A microcontroller.
    Keywords: The 31 level multilevel inverter;modulation technique and PIC16F877A controller;semiconductor;distortion;output;voltage