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Journal of Engineering and Applied Sciences

ISSN: Online 1818-7803
ISSN: Print 1816-949x
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A New Combination Method to Error Detection and Correction Using VHDL

Adham Hadi Saleh, Wisam Najm Al-Din Abed and Adnan M. Taha
Page: 6167-6172 | Received 21 Sep 2022, Published online: 21 Sep 2022

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Abstract

In this study, we proposed a new technique to detect and correct single and burst errors using Hybrid Automatic Repeat-Request (HARQ) which mainly depended on merging of CRC (Cyclic Redundancy Check) and Hamming code at the same time, single error covered by FEC (Foreword Error Correction) using Hamming code while burst error would be covered by retransmitted. The Xilinx ISE 10.1 simulator was used for simulating VHDL (VHSIC (Very High Speed Integrated Circuit) Hardware Description Language) code for both the transmitter and receiver sides. The transmitter and receiver circuits has been designed and implemented successfully.


How to cite this article:

Adham Hadi Saleh, Wisam Najm Al-Din Abed and Adnan M. Taha. A New Combination Method to Error Detection and Correction Using VHDL.
DOI: https://doi.org/10.36478/jeasci.2018.6167.6172
URL: https://www.makhillpublications.co/view-article/1816-949x/jeasci.2018.6167.6172